The present invention relates to data storage devices, and more particularly, to method and system for reducing bias current settling time in read pre-amplifiers for magneto-resistive (MR) disk drives.
MR heads operate on a physical phenomenon known as the magneto-resistive effect. Certain metals, when exposed to a magnetic field, change their resistance to the flow of electricity. This property is exploited in creating read heads for disc drives. To read information from the media, a read pre-amplifier coupled to the MR head contains a bias current generator that constantly supplies the MR head with a bias current. For example, the bias generator may provide a fixed value of the bias current. When the MR head passes over a magnetic field on the media, the head changes its resistance. As the bias current has a fixed value, variations in the resistance of the MR head lead to change in the voltage produced across the MR head. The read pre-amplifier may comprise a voltage amplifier to amplify this voltage to an appropriate level.
A big advantage of MR heads is their ability to read signals when bits are packed closely together. MR heads also able to better distinguish bits between closely spaced adjacent tracks. As a result, designers can build MR drives with higher data density than using conventional inductive read heads.
The interface requirements for an MR head are significantly different from those of conventional inductive read heads. The bias current passing through the MR head must be set correctly to obtain a linear dependence of the output signal on the magnetic field of the media. Incorrect biasing will result in voltage pulses with distorted shapes and amplitudes.
As MR heads have a large tolerance in their magneto-resistive characteristics, a unique bias current (Imr) is required for each MR head used in a disk drive. In a disk drive containing multiple MR heads, a new Imr value should be set after each head change.
Any noise in the bias current is amplified 200 times or more and seen at the output of the read pre-amplifier. Therefore, the read pre-amplifier must utilize a large capacitor in parallel with the MR head to shunt noise that could be induced in the bias current. Large time constants resulting from these large noise shunting capacitors make it difficult to change heads and bias current values at high speeds. The time period needed for the bias, current to reach a steady state level after initiating an Imr change is called the bias current settling time.
For example, a timing diagram in FIG. 1 illustrates a simulated bias current transition from 12 mA to 5 mA for a noise shunting capacitor Cn=3.3 pF. As shown in the timing diagram, it takes 6.7 xcexcsec for a bias current Imr to reach a steady state level at 105% of 5 mA.
As transfer rates of MR disk drive systems increase, pre-amplifiers must be able to set bias currents at higher speeds after changing MR heads. Therefore, it would be desirable to provide a system that reduces the bias current settling time.
Moreover, a system for reducing the bias current settling time would allow a larger capacitor to be used for noise shunting. As a result, a noise sensitivity of an MR head read pre-amplifier would be reduced.
Accordingly, the advantage of the present invention is in providing a system for reducing bias current settling time in an MR head read pre-amplifier.
Another advantage of the present invention is in providing an MR head read pre-amplifier having a large noise shunting capacitor to reduce a noise sensitivity.
These and other advantages of the present invention are achieved at least in part by providing a novel arrangement for reading data from a magnetic data carrier. This arrangement includes a magneto-resistive (NM) head and a bias current source for supplying the MR head with a bias current. The bias current source is controlled by a bias current control signal from a bias current controller to adjust a value of the bias current for a particular MR head. A noise shunting capacitor is connected to the MR head to reduce a noise level. A discharging circuit coupled to the noise shunting capacitor is responsive to the bias current control signal for discharging the noise shunting capacitor when the bias current is being adjusted. As a result, the bias current settling time is reduced.
In the preferred embodiment, the bias current control signal comprises multiple control bits. The discharging circuit has at least one discharging switch for each control bit of the bias current control signal. This discharging switch is controlled by a pulse generator triggered by a falling edge of the corresponding control bit of the bias current control signal to produce a discharge current for discharging the noise shunting capacitor.
For example, the discharging circuit may comprise a pair of switches provided for each control bit of the bias current control signal. This pair includes a positive discharging switch coupled to a positive plate of the noise shunting capacitor and a negative discharging switch coupled to a negative plate of the noise shunting capacitor. The positive and negative discharging switches are controlled by the falling edge of the corresponding control bit to pull down a positive potential at the positive capacitor plate and to pull up a negative potential at the negative capacitor plate.
Preferably, a weighting element is coupled to each discharging switch for weighting a value of the discharge current produced by the switch in accordance with a position of the corresponding control bit. For example, the weighting element may be a resistor having a resistance value selected so as to produce a higher value of the discharge current in response to a higher-order control bit of the bias current control signal.
In another embodiment, a charging circuit coupled to the noise shunting capacitor is responsive to the bias current control signal for pre-charging the capacitor when the bias current is being adjusted. The charging circuit may comprise one charging switch for each control bit of the bias current control signal. The charging switch may be controlled by a pulse generator triggered by a rising edge of the corresponding control bit to produce a charge current for pre-charging the noise shunting capacitor. A weighting element may be coupled to each charging switch for weighting a value of the charge current in accordance with a position of the control bit so as to produce a larger charge current in response to a higher-order control bit.
In accordance with a method of the present invention, the following steps are carried out to reduce bias current settling time:
supplying a control signal to adjust the bias current, and
discharging the noise shunting capacitor in response to a falling edge of the control signal.
Also, the capacitor may be pre-charged in response to a rising edge of the control signal.
Still other objects and advantages of the present invention will become readily apparent to those skilled in this art from the following detailed description, wherein only the preferred embodiment of the invention is shown and described, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, all without departing from the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive.